An interesting article

Risc has been invented many times over, the bit of genius was matching the arcitecture with the tasks in an environment where Intell had no real footing. Brian

Much faster with 128 registers.

I know people who worked for acorn. As I understand it it was a classic case of British lack of cash and ingenuity.

The chip size they could afford was limited, so it had to be RISC, and not only RISC, but with a limited instruction set even then, so they came up with a very easy to decode instruction format, that would do everything needed, just not always in one instruction, and then clocked the thing as fast as was reliable.

And that was that. Until people running battery powered devices discovered that the grunt per watt was infinitely better than any Intel atom style chip, and the cost way less, and the rest, is history. It was a happy accident coinciding with some very acute design work by a very small team,

It was move from nmos to cmos using a fraction of the power that made the arm core ideal for battery powered devices.

The killer decision was to license the arm core to anyone who wanted to embed it inside their own chip of wonders.

I wonder how far INMOS would have got with 7nm technology..